1. Technical Field
The invention relates generally to electrical circuits, and more specifically, to soft latches in electrical circuits.
2. Background Art
Driver receiver systems in networks that are subject to noise often include a latch to improve internal waveforms by means of hysteresis. Typically, a driver receiver system includes a latch directly in the signal path to allow the internal network voltage to switch between logic states when a threshold voltage has been reached. Normal latches used directly in the signal path, though, create a time delay as the latch is set and reset with each new logic transient.
Soft latches may be used in driver receiver systems to catch and hold logic signals without incurring the time delay normally seen in setting or resetting a normal latch. Furthermore, soft latches, like normal latches, can be used to stabilize otherwise floating nodes. In recent years, applications of soft latches have been expanded to include insertion into large networks or on circuit nodes which receive their logic signals from across large networks. Some examples of these large networks include microprocessor buses and DRAM chip to chip wiring networks. Unfortunately, these large networks are susceptible to multiple noise sources. A conventional soft latch's resistance to extended noise gradually weakens as a function of time. The hysteresis characteristics of a conventional soft latch has "soft" corners. Thus, noise may be propagated past the common input/output node of a conventional soft latch or even set the soft latch into an erroneous state.
One solution in dealing with noise in a large network is the use of a low frequency filter. Filtering, though, adds a signal delay to the circuit, thus defeating one of the purposes of using a soft latch.
There has arisen, therefore, a need for soft latches with improved noise immunity across a wide spectrum of noise sources and noise source frequencies.